Comp 255
Principles of Computer Organization
Fall 2007
Instructor: Brian Shelburne
- 329E Science - x7862
bshelburne@ wittenberg.edu
Class Times Lecture - MWF 10:20
- 11:20; Lab - Th 9:10 - 11:10
Textbooks
- Computer Architecture and
Organization: An integrated Approach.
- M. Murdocca & V. Heurling
- Four Architectures: A Supplementary Text for COMP 255
- Computer Organization - Fall 2007; B. Shelburne
- PDP-8 Emulator User's Manual
- The ARC (A Risc Computer) Instruction Set
- The Java Virtual Machine Engine User's Manual
- A Brief Introduction to Intel
80x86 Assembler Programming
Links to Local Webpages
- Machine
Levels: Computer organization can be modeled as a hierarchy of
levels starting from the hardware (digital logic level) working upward
to micro-architecture, machine code (Instruction Set Architecture) etc.
A function on a given level is implemented by a set of functions on the
level below
- Von
Neumann Architecture: what do we mean by von Neumann architecture?
- An
Overview of the History of Computers. A brief list of important, people,
computers, and events in the history of computers.
- From
the U.S. Constitution to IBM: How the problem of the 1880
census indirectly led to the formation of IBM - a demonstration of how
the need for data procession drove the development of the computer.
- Two's
Complement Wheel: a graphical example of how twos complement representation
works.
-
Multiplication and
Division of Binary Integers.
- An
Overview of the Architecture of the PDP-8: updated 09/01/02. A
zip file containing an executable copy of the PDP-8 Emulator program can
be downloaded by clicking
here.
- PDP-8
Assembler: A brief description of PDP-8 assembler and how assemblers
work
- IEEE Standard 754 for Floating Point Numbers: A useful website
from the
Pittsburg
Supercomputing Center
- Companion Website
to Murdocca & Heuring's Computer Architecture and
Organization: An Integrated Approach (CAO)
-
The ARC Instruction Set ARC stands for "A RISC Computer", an architecture based on
the SPARC (Scalable Processor Architecture) developed at SUN Microsystems
in the 80's
- A Java Byte Code Engine: A simulator that allows the user to
assemble and run a subset of Java Byte code. The
Java Engine Manual provides documentation for the assembler
and simulator as well as a list of the Java Byte Code
instructions used by the Java Engine.
- An
Introduction to the Intel 80x86 Architecture: including an introduction
to writing Intel 80x86 assembler
- An Introduction
to MS-DOS: a simple command line operating system that "works"
within a Command Prompt window.
- Quick
& Dirty Debug: A brief one page cheat-sheet for using DEBUG
- Memory
: basic structure of main memory, big-endian vs little endian memory,
error-correcting codes, basic cache issues.
- Disk
I/O: Physical and logical organization of a floppy diskette including
a partial list of Intel 80x86 INT 13h, 21h, 25h, and 26h instructions
for disk I/O.
- Intel
80x86 Branching: A brief introduction to conditional and unconditional
branching on the Intel 80x86 architecture.
- Boolean
and Arithmetic Instructions on the Intel 80x86: Shifts, rotates,
boolean and arithmetic instructions plus code to read and write hexadecimal
and decimal integers.
- Processors:
Fetch-Execute Cycle, Datapaths, RISC vs CISC, and Pipelines
- Addressing
Modes: Methods to calculate the effective address of an operand.
- Subroutines
and Interrupts: What they are and how they are implemented on the Intel
80x86 and PDP-8 architectures.
- Parameters. Links to .pdf documents on parameter passing on the PDP-8
(using parameter slots) and on the Intel
80x86 (demonstrating four different approaches but concentrating on using
the stack)
Links to Other Sites